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Verilog project architecture examples

Interactive architecture diagrams of 95 open-source Verilog repositories with a GitDiagram architecture diagram, most stars first. Each diagram shows the project's main components, how they connect, and links every part to its file on GitHub.

Repositories 1–50 of 95

  1. yosyshq/picorv32★ 4.4k

    PicoRV32 is a size-optimized, parameterized Verilog RISC-V CPU implementing configurable RV32E/I/IM/IC/IMC variants.

  2. the-openroad-project/openroad★ 3.1k

    OpenROAD is a C++ digital IC implementation platform for RTL-to-layout flows.

  3. darklife/darkriscv★ 2.6k

    DarkRISCV is an open-source RISC-V FPGA softcore and surrounding SoC.

  4. nvdla/hw★ 2.2k

    This repository contains the SystemC C-model of NVIDIA’s NVDLA inference accelerator.

  5. alexforencich/verilog-axi★ 2.2k

    This repository is a collection of parametrizable Verilog AXI4 and AXI4-Lite hardware components, rather than a single end-user application.

  6. vortexgpgpu/vortex★ 2k

    Simulation Backends (sim): Several simulation environments exist, for instance, simx (C++ based simulation), rtlsim, opaesim, and XRt simulation.

  7. pconst/basic_verilog★ 1.9k

    This repository is not a conventional “frontend‐backend” application but a comprehensive FPGA IP library and toolbox.

  8. riscv-mcu/e203_hbirdv2★ 1.8k

    - This is the open-source Hummingbirdv2 E203 RISC-V core plus SoC integration, not just a single CPU RTL drop.

  9. ufrisk/pcileech-fpga★ 1.8k

    PCILeech FPGA is a family of FPGA firmware designs that pair with the PCILeech DMA toolkit and MemProcFS.

  10. xuantie-rv/openc910★ 1.5k

  11. tiny-tpu-v2/tiny-tpu★ 1.4k

  12. ultraembedded/biriscv★ 1.3k

  13. lnis-uofu/openfpga★ 1.2k

  14. digital-eda/digital-ide★ 1.1k

  15. open-sdr/openwifi-hw★ 905

  16. luthiraa/talos-v2★ 781

  17. the-openroad-project/openroad-flow-scripts★ 741

  18. alexforencich/verilog-i2c★ 730

  19. antonblanchard/microwatt★ 729

  20. zipcpu/wb2axip★ 714

  21. the-openroad-project/opensta★ 619

  22. omarelhedaby/cnn-fpga★ 611

  23. qshen3/cnn-fpga★ 593

  24. fguzman82/gategpt★ 579

  25. ibm/accdnn★ 447

  26. secworks/aes★ 426

  27. angelojacobo/uberddr3★ 423

  28. xuantie-rv/openc906★ 394

  29. evensgn/risc-v-cpu★ 390

  30. pulp-platform/cheshire★ 372

  31. lawrie/fpga_pio★ 322

  32. vipinkmenon/neuralnetwork★ 318

  33. xilinx/libsystemctlm-soc★ 307

  34. fesens/opentpu★ 306

  35. openasic-org/xk265★ 290

  36. chipsalliance/f4pga-examples★ 287

  37. funningboy/uvm_axi★ 268

  38. aniketbadhan/convolutional-neural-network★ 244

  39. snbk001/verilog-design-examples★ 232

  40. rafaelcalcada/rvx★ 203

  41. thedatabusdotio/fpga-ml-accelerator★ 196

  42. ash-olakangal/risc-v-processor★ 182

  43. excessivemotion/controller-software★ 165

  44. kasirga-kizil/tekno-kizil★ 159

  45. neelkshah/mips-processor★ 146

  46. geohot/gpunoob★ 139

  47. moonshotai/nano-kpu★ 138

  48. mister-devel/gameboy_mister★ 137

  49. open-sdr/openofdm★ 135

  50. freecores/dma_axi★ 125

Counted over GitDiagram's stored diagrams of public repositories, from the names their components and groups carry and the files they link to; the rules are the ones in the 2026 open-source architecture report. Stars are GitHub's when the diagram was last made. Rebuilt daily: hubs grow as more repositories' languages are known.