How tuannamnguyen1902/edabk_verilog works
This repository is a collection of independent hardware and arithmetic exercises rather than one integrated product. The only sampled implementation is a C++ reference program for an 8×8 matrix-vector multiply: it computes each row’s dot product, stores the eight outputs, and prints them. The tree also contains separate UART, clock, ALU, FIR, MAC, and matrix-vector HDL projects, but there is no README and their source was not sampled, so their internal wiring is not established here.
Main entry points: matrix_mul.cpp Matrix multiply
Components 10
Software reference
- Matrix multiply
RISC_V/matrix_mul.cpp - RISC-V assembly
RISC_V/matrix_mul.s
HDL projects
- APB UART
UART/hdl - 4-bit ALU
alu4bit - Century clock
century_clock - 8-tap FIR
fir_8tap - MAC variants
m_ac - Matrix-vector HDL
matvec_mult.v - 16-bit adder
bailab3
Other components
- Program user
Connections 2
- Program user → Matrix multiply: runs
RISC_V/matrix_mul.cpp - Matrix multiply → Program user: prints results
RISC_V/matrix_mul.cpp