How the-silis-foundation/silis works
Silis is an end-to-end RTL-to-GDSII ASIC design studio with GUI, CLI, and Python SDK interfaces. The principal workflow takes RTL and constraints through synthesis and formal checks, physical planning and power intent, then toward layout and signoff; the README also describes DFT, simulation, and interactive design inspection. The graph preserves these major capabilities, while relationships beyond the README’s pipeline excerpt are omitted or marked unverified because their callers were not sampled.
Main entry points: pipeline.py Flow Pipeline · floorplanner.py Floorplanning · main.py CLI Tools · gds_snapshot.py Layout Snapshot
Components 20
Project Entry
- CLI Tools
core/cli/main.py - Project Registry
core/project_registry.py - RTL Intake
core/intake
Design Implementation
- Flow Pipeline
core/sdk/pipeline.py - Synthesis
core/synthesisscripts/synthesisthread.py - Floorplanning
core/backendflow/floorplanner/floorplanner.py - Region Placement
core/backendflow/floorplanner/region_autoplacer.py - Power Intent
core/backendflow/power/upf_engine.py - Layout Snapshot
core/backendflow/gds_snapshot.py - Tapeout Fill
core/tapeout/fill_engine.py
Verification
- DFT Scan
core/dft/dft_engine.py - Gate Simulation
core/simulation/gls_engine.py - LVS Signoff
core/lvs/lvs_engine.py - Signoff Reports
core/backendflow/signoff_report.py
Design Inspection
- Layout Viewer
core/backendflow/siliconpeeker/peeker.py - Schematic Viewer
core/schematicviewer - Waveform Viewer
core/signalpeeker
SDK and Platform
- PDK Manager
core/pdkmanagers/pdk/manager.py - Python SDK
core/sdk
Other components
- ASIC Engineer
Connections 20
- ASIC Engineer → CLI Tools: starts flow
- ASIC Engineer → Python SDK: automates design
- CLI Tools → Project Registry: manages projects
core/cli/main.py - CLI Tools → Flow Pipeline: runs flow
- RTL Intake → Synthesis: provides RTL
- Flow Pipeline → Synthesis: orchestrates
- Flow Pipeline → Floorplanning: invokes planning
core/sdk/pipeline.py - Floorplanning → Region Placement: uses placement
core/backendflow/floorplanner/floorplanner.py - Floorplanning → Power Intent: reads intent
core/backendflow/floorplanner/floorplanner.py - Floorplanning → PDK Manager: queries PDK
core/backendflow/floorplanner/floorplanner.py - Flow Pipeline → Region Placement: invokes placement
core/sdk/pipeline.py - Flow Pipeline → Layout Snapshot: uses snapshots
core/sdk/pipeline.py - Layout Snapshot → Tapeout Fill: supports fill
core/tapeout/fill_engine.py - ASIC Engineer → DFT Scan: configures scan
- ASIC Engineer → Gate Simulation: runs simulation
- ASIC Engineer → LVS Signoff: checks layout
- ASIC Engineer → Layout Viewer: inspects layout
- ASIC Engineer → Schematic Viewer: inspects logic
- ASIC Engineer → Waveform Viewer: views traces
- Flow Pipeline → Signoff Reports: supports signoff