How siubikyt/digital-logic-circuits works
This repository is a collection of digital logic circuit designs intended for use with Digital, a logic simulator. Its catalog covers arithmetic building blocks, ALUs, CPUs, selection and decoding circuits, and memory. The tree identifies these distinct circuit designs, but no source excerpts or README descriptions establish how they are composed or invoked. Accordingly, the graph groups the designs by function and omits speculative wiring between them or to the simulator.
Components 18
Arithmetic
- Half adder
Arithmetic/Addition/Half adder.dig - Full adder
Arithmetic/Addition/Full adder.dig - Half subtractor
Arithmetic/Subtraction/Half subtractor.dig - Full subtractor
Arithmetic/Subtraction/Full subtractor.dig
ALUs
- 8-bit ALU with logic gates
ALUs/8 bit ALU logic gates.dig - 8-bit ALU without logic gates
ALUs/8 bit ALU no logic gates.dig - Complex 8-bit ALU
ALUs/Complex 8 bit ALU.dig
Selection and decoding
- 3-to-8 decoder
Decoders/3 to 8 line decoder.dig - 4-to-16 decoder
Decoders/4 to 16 line decoder.dig - 5-to-32 decoder
Decoders/5 to 32 line decoder.dig - 1x2 demultiplexer
Demultiplexers/1x2 demultiplexer.dig - 1x4 demultiplexer
Demultiplexers/1x4 demultiplexer.dig - 2x1 multiplexer
Multiplexers/2x1 multiplexer.dig - 4x1 multiplexer
Multiplexers/4x1 multiplexer.dig
Memory
- 8x8-bit RAM
Memory/8x8 bit RAM.dig - Binary cell
Memory/Binary cell.dig