shiva16/adam-eeg

Purpose and Deliverable

Adam-EEG is an open-hardware reference design for a 32-channel, simultaneous-sampling EEG/biopotential acquisition board. The repository contains CAD sources packaged in EEG_64_1.zip; it is not a firmware or host-software repository. The primary entry points are the EAGLE schematic (EEG_64.sch) and board layout (EEG_64_1.brd) inside that archive.

CAD and Fabrication Boundary

The authoritative design is EAGLE 6.6 XML, with a single schematic sheet and a two-layer PCB layout. Engineers modify or inspect the design by extracting EEG_64_1.zip, opening the schematic/layout in EAGLE or converting them to another CAD system. Gerbers are intentionally not versioned; fabrication outputs are generated from the board file.

Paths: EEG_64_1.zip, README.md.

Analog Acquisition Stage

Four TI ADS1299 analog front ends each digitize eight biopotential channels at 24-bit resolution. This is the core architectural stage: all 32 channels are sampled simultaneously rather than multiplexed. Electrode inputs feed per-channel analog conditioning and the ADS1299 devices; the board exposes primary electrode and buffered channel-output headers.

Paths: EEG_64_1.zip, README.md.

Shared SPI Daisy Chain

The ADS1299 devices operate as a multi-device SPI chain. They share SCLK, DIN, DOUT, and DRDY, while CS1–CS4 provide per-device selection; serial conversion results flow through the daisy chain to the controller or external host. The ARDUINO_CONN header exposes these signals so an external Arduino-compatible controller can drive the acquisition chain independently of onboard controllers.

Paths: EEG_64_1.zip, README.md.

Control, Programming, and Logging

Two SMD ATmega328 microcontrollers provide Arduino-compatible onboard control. Two AVR ISP headers are the programming boundary. The intended standalone flow is ADS1299 acquisition → ATmega328 control/readout → onboard microSD logging, avoiding a required host PC. Firmware and data formats are not included in this repository.

Paths: EEG_64_1.zip, README.md.

Power and Signal-Integrity Domain

A +5 V / AGND input feeds onboard bipolar analog supply generation. An LM2663 switched-capacitor inverter and LP5907/TPS723xx LDOs produce clean split rails for sensitive AFEs. Crystals provide board clocking. This power domain is architecturally separate from electrode inputs and digital SPI/control signals, and safe operation requires isolated battery-backed power when attached to a person.

Paths: EEG_64_1.zip, README.md.

External Interfaces and Constraints

Physical interfaces include electrode headers, buffered-output/test headers, SPI/control breakout, microSD, power input, inline SPI jumpers, and AVR ISP. EAGLE is the material design runtime; an EAGLE-to-KiCad conversion is possible but not maintained here. This is research/prototype hardware without medical certification or verified patient isolation.

Paths: EEG_64_1.zip, LICENSE, README.md.