# shiva16/adam-eeg architecture

> Architecture diagram of the GitHub repository shiva16/adam-eeg, generated by GitDiagram from its file tree, README and a sample of source files (last updated 2026-08-13). It is an AI-made overview: check details against the source.

- Interactive diagram: https://gitdiagram.com/shiva16/adam-eeg
- Repository: https://github.com/shiva16/adam-eeg

## Overview

#### Purpose and Deliverable
Adam-EEG is an open-hardware reference design for a 32-channel, simultaneous-sampling EEG/biopotential acquisition board. The repository contains CAD sources packaged in `EEG_64_1.zip`; it is not a firmware or host-software repository. The primary entry points are the EAGLE schematic (`EEG_64.sch`) and board layout (`EEG_64_1.brd`) inside that archive.

#### CAD and Fabrication Boundary
The authoritative design is EAGLE 6.6 XML, with a single schematic sheet and a two-layer PCB layout. Engineers modify or inspect the design by extracting `EEG_64_1.zip`, opening the schematic/layout in EAGLE or converting them to another CAD system. Gerbers are intentionally not versioned; fabrication outputs are generated from the board file.
Paths: `EEG_64_1.zip`, `README.md`.

#### Analog Acquisition Stage
Four TI ADS1299 analog front ends each digitize eight biopotential channels at 24-bit resolution. This is the core architectural stage: all 32 channels are sampled simultaneously rather than multiplexed. Electrode inputs feed per-channel analog conditioning and the ADS1299 devices; the board exposes primary electrode and buffered channel-output headers.
Paths: `EEG_64_1.zip`, `README.md`.

#### Shared SPI Daisy Chain
The ADS1299 devices operate as a multi-device SPI chain. They share `SCLK`, `DIN`, `DOUT`, and `DRDY`, while `CS1`–`CS4` provide per-device selection; serial conversion results flow through the daisy chain to the controller or external host. The `ARDUINO_CONN` header exposes these signals so an external Arduino-compatible controller can drive the acquisition chain independently of onboard controllers.
Paths: `EEG_64_1.zip`, `README.md`.

#### Control, Programming, and Logging
Two SMD ATmega328 microcontrollers provide Arduino-compatible onboard control. Two AVR ISP headers are the programming boundary. The intended standalone flow is ADS1299 acquisition → ATmega328 control/readout → onboard microSD logging, avoiding a required host PC. Firmware and data formats are not included in this repository.
Paths: `EEG_64_1.zip`, `README.md`.

#### Power and Signal-Integrity Domain
A +5 V / AGND input feeds onboard bipolar analog supply generation. An LM2663 switched-capacitor inverter and LP5907/TPS723xx LDOs produce clean split rails for sensitive AFEs. Crystals provide board clocking. This power domain is architecturally separate from electrode inputs and digital SPI/control signals, and safe operation requires isolated battery-backed power when attached to a person.
Paths: `EEG_64_1.zip`, `README.md`.

#### External Interfaces and Constraints
Physical interfaces include electrode headers, buffered-output/test headers, SPI/control breakout, microSD, power input, inline SPI jumpers, and AVR ISP. EAGLE is the material design runtime; an EAGLE-to-KiCad conversion is possible but not maintained here. This is research/prototype hardware without medical certification or verified patient isolation.
Paths: `EEG_64_1.zip`, `LICENSE`, `README.md`.

Main entry points: [`EEG_64_1.zip`](https://github.com/shiva16/adam-eeg/blob/master/EEG_64_1.zip) (4× ADS1299), [`README.md`](https://github.com/shiva16/adam-eeg/blob/master/README.md) (Design guidance), [`LICENSE`](https://github.com/shiva16/adam-eeg/blob/master/LICENSE) (License)

## Diagram (Mermaid)

```mermaid
flowchart TD

subgraph group_cad["CAD & Fabrication"]
  node_archive["EAGLE CAD archive<br/>design source<br/>[EEG_64_1.zip]"]
  node_eagle["EAGLE CAD<br/>design runtime"]
  node_fabrication["Fabrication outputs<br/>generated Gerbers"]
  node_readme["Design guidance<br/>documentation<br/>[README.md]"]
  node_license["License"]
end

subgraph group_acquisition["32-Channel Acquisition"]
  node_electrodes["Electrode headers<br/>analog input<br/>[EEG_64_1.zip]"]
  node_conditioning["Per-channel conditioning<br/>analog front end<br/>[EEG_64_1.zip]"]
  node_ads1299["4× ADS1299<br/>24-bit simultaneous AFE<br/>[EEG_64_1.zip]"]
  node_buffered_outputs["Buffered/test headers<br/>signal output<br/>[EEG_64_1.zip]"]
  node_spi_chain["Shared SPI daisy chain<br/>digital acquisition bus<br/>[EEG_64_1.zip]"]
end

subgraph group_control["Control &amp; Logging"]
  node_arduino_conn["ARDUINO_CONN header<br/>external SPI breakout<br/>[EEG_64_1.zip]"]
  node_atmega["2× ATmega328<br/>onboard controller<br/>[EEG_64_1.zip]"]
  node_isp["2× AVR ISP headers<br/>programming interface<br/>[EEG_64_1.zip]"]
  node_microsd[("microSD<br/>onboard logging<br/>[EEG_64_1.zip]")]
end

subgraph group_power["Power &amp; Safety"]
  node_power_input["+5 V / AGND input<br/>power interface<br/>[EEG_64_1.zip]"]
  node_split_rails["Bipolar analog rails<br/>analog power stage<br/>[EEG_64_1.zip]"]
  node_clock["Crystals<br/>clock source<br/>[EEG_64_1.zip]"]
end

node_archive -->|"opened in"| node_eagle
node_eagle -->|"exports"| node_fabrication
node_readme -.->|"describes"| node_archive
node_license -.->|"governs"| node_archive
node_electrodes -->|"biopotential inputs"| node_conditioning
node_conditioning -->|"32 analog channels"| node_ads1299
node_ads1299 -->|"channel outputs"| node_buffered_outputs
node_ads1299 -->|"digitized samples"| node_spi_chain
node_spi_chain -->|"acquisition readout"| node_atmega
node_spi_chain -->|"external control access"| node_arduino_conn
node_isp -->|"programs"| node_atmega
node_atmega -->|"logs samples"| node_microsd
node_power_input -->|"supplies"| node_split_rails
node_split_rails -->|"clean analog power"| node_ads1299
node_power_input -->|"digital power"| node_atmega
node_clock -->|"conversion clock"| node_ads1299
node_clock -->|"controller clock"| node_atmega

click node_archive "https://github.com/shiva16/adam-eeg/blob/master/EEG_64_1.zip"
click node_electrodes "https://github.com/shiva16/adam-eeg/blob/master/EEG_64_1.zip"
click node_conditioning "https://github.com/shiva16/adam-eeg/blob/master/EEG_64_1.zip"
click node_ads1299 "https://github.com/shiva16/adam-eeg/blob/master/EEG_64_1.zip"
click node_buffered_outputs "https://github.com/shiva16/adam-eeg/blob/master/EEG_64_1.zip"
click node_spi_chain "https://github.com/shiva16/adam-eeg/blob/master/EEG_64_1.zip"
click node_arduino_conn "https://github.com/shiva16/adam-eeg/blob/master/EEG_64_1.zip"
click node_atmega "https://github.com/shiva16/adam-eeg/blob/master/EEG_64_1.zip"
click node_isp "https://github.com/shiva16/adam-eeg/blob/master/EEG_64_1.zip"
click node_microsd "https://github.com/shiva16/adam-eeg/blob/master/EEG_64_1.zip"
click node_power_input "https://github.com/shiva16/adam-eeg/blob/master/EEG_64_1.zip"
click node_split_rails "https://github.com/shiva16/adam-eeg/blob/master/EEG_64_1.zip"
click node_clock "https://github.com/shiva16/adam-eeg/blob/master/EEG_64_1.zip"
click node_readme "https://github.com/shiva16/adam-eeg/blob/master/README.md"
click node_license "https://github.com/shiva16/adam-eeg/blob/master/LICENSE"

classDef toneNeutral fill:#f8fafc,stroke:#334155,stroke-width:1.5px,color:#0f172a
classDef toneBlue fill:#dbeafe,stroke:#2563eb,stroke-width:1.5px,color:#172554
classDef toneAmber fill:#fef3c7,stroke:#d97706,stroke-width:1.5px,color:#78350f
classDef toneMint fill:#dcfce7,stroke:#16a34a,stroke-width:1.5px,color:#14532d
classDef toneRose fill:#ffe4e6,stroke:#e11d48,stroke-width:1.5px,color:#881337
classDef toneIndigo fill:#e0e7ff,stroke:#4f46e5,stroke-width:1.5px,color:#312e81
classDef toneTeal fill:#ccfbf1,stroke:#0f766e,stroke-width:1.5px,color:#134e4a
class node_archive,node_eagle,node_fabrication,node_readme,node_license toneBlue
class node_electrodes,node_conditioning,node_ads1299,node_buffered_outputs,node_spi_chain toneAmber
class node_arduino_conn,node_atmega,node_isp,node_microsd toneMint
class node_power_input,node_split_rails,node_clock toneRose
```

## Components

### CAD & Fabrication

- [EAGLE CAD archive](https://github.com/shiva16/adam-eeg/blob/master/EEG_64_1.zip): design source · Authoritative EAGLE 6.6 schematic and two-layer board layout. · `EEG_64_1.zip`
- **EAGLE CAD**: design runtime · Used to inspect, modify, or export the design.
- **Fabrication outputs**: generated Gerbers · Generated from the board layout; not versioned.
- [Design guidance](https://github.com/shiva16/adam-eeg/blob/master/README.md): documentation · Documents interfaces, conversion notes, and prototype limitations. · `README.md`
- [License](https://github.com/shiva16/adam-eeg/blob/master/LICENSE): license · `LICENSE`

### 32-Channel Acquisition

- [Electrode headers](https://github.com/shiva16/adam-eeg/blob/master/EEG_64_1.zip): analog input · `EEG_64_1.zip`
- [Per-channel conditioning](https://github.com/shiva16/adam-eeg/blob/master/EEG_64_1.zip): analog front end · `EEG_64_1.zip`
- [4× ADS1299](https://github.com/shiva16/adam-eeg/blob/master/EEG_64_1.zip): 24-bit simultaneous AFE · Four eight-channel converters provide 32 simultaneous channels. · `EEG_64_1.zip`
- [Buffered/test headers](https://github.com/shiva16/adam-eeg/blob/master/EEG_64_1.zip): signal output · `EEG_64_1.zip`
- [Shared SPI daisy chain](https://github.com/shiva16/adam-eeg/blob/master/EEG_64_1.zip): digital acquisition bus · SCLK, DIN, DOUT, DRDY and CS1–CS4 connect the converters. · `EEG_64_1.zip`

### Control & Logging

- [ARDUINO_CONN header](https://github.com/shiva16/adam-eeg/blob/master/EEG_64_1.zip): external SPI breakout · Allows an external Arduino-compatible controller to drive acquisition. · `EEG_64_1.zip`
- [2× ATmega328](https://github.com/shiva16/adam-eeg/blob/master/EEG_64_1.zip): onboard controller · Arduino-compatible acquisition control and readout. · `EEG_64_1.zip`
- [2× AVR ISP headers](https://github.com/shiva16/adam-eeg/blob/master/EEG_64_1.zip): programming interface · `EEG_64_1.zip`
- [microSD](https://github.com/shiva16/adam-eeg/blob/master/EEG_64_1.zip): onboard logging · Supports standalone acquisition logging. · `EEG_64_1.zip`

### Power & Safety

- [+5 V / AGND input](https://github.com/shiva16/adam-eeg/blob/master/EEG_64_1.zip): power interface · Use isolated battery-backed power for person-connected operation. · `EEG_64_1.zip`
- [Bipolar analog rails](https://github.com/shiva16/adam-eeg/blob/master/EEG_64_1.zip): analog power stage · LM2663 inverter and LDOs generate clean split supplies. · `EEG_64_1.zip`
- [Crystals](https://github.com/shiva16/adam-eeg/blob/master/EEG_64_1.zip): clock source · `EEG_64_1.zip`

## Connections

- EAGLE CAD archive → EAGLE CAD: opened in
- EAGLE CAD → Fabrication outputs: exports
- Design guidance → EAGLE CAD archive: describes
- License → EAGLE CAD archive: governs
- Electrode headers → Per-channel conditioning: biopotential inputs
- Per-channel conditioning → 4× ADS1299: 32 analog channels
- 4× ADS1299 → Buffered/test headers: channel outputs
- 4× ADS1299 → Shared SPI daisy chain: digitized samples
- Shared SPI daisy chain → 2× ATmega328: acquisition readout
- Shared SPI daisy chain → ARDUINO_CONN header: external control access
- 2× AVR ISP headers → 2× ATmega328: programs
- 2× ATmega328 → microSD: logs samples
- +5 V / AGND input → Bipolar analog rails: supplies
- Bipolar analog rails → 4× ADS1299: clean analog power
- +5 V / AGND input → 2× ATmega328: digital power
- Crystals → 4× ADS1299: conversion clock
- Crystals → 2× ATmega328: controller clock