How lnc0831/1bitfm works
1bitFM streams stereo PCM audio from a computer to a Zynq FPGA, where RTL produces a 1-bit FM waveform for an FM receiver. The main workflow is file/tone preparation, TCP transfer, firmware buffering and optional processing, DMA delivery, stereo FM encoding and RF serialization. A separate Simulink reference model covers algorithm-level modulation and demodulation. RTL connections are summarized from the README and tree; detailed implementation wiring was not sampled, so uncertain internal links are omitted.
Main entry points: fm_top.sv FPGA top · main.c Firmware service · runFmDemo.m Simulation runner · fm_tx_core.sv FM transmit core
Components 22
Audio input
- Audio sender
scripts/send-audio.py
PS firmware
- Firmware service
vitis/fm_app/src/main.c - PCM block queue
vitis/fm_app/src/audio_queue.c - Audio processing
vitis/fm_app/src/audio_processor.c - AXI DMA
bd/ps/ps.bd
FPGA signal path
- AXIS audio FIFO
ip/audio_axis_fifo/audio_axis_fifo.xci - PCM AXIS receive
rtl/axis_pcm_rx.sv - Stereo DSP
rtl/stereo_dsp.sv - Stereo encoder
rtl/stereo_encoder.sv - FM transmit core
rtl/fm_tx_core.sv - FM frequency word
rtl/fm_frequency_word.sv - FM NCO
rtl/fm_nco8.sv - RF serializer
rtl/fm_serializer.sv - FPGA top
rtl/fm_top.sv
Reference model
- Simulation runner
simulink/runFmDemo.m - Model builder
simulink/buildFmModel.m - Reference signal chain
simulink/fm1bit_tx.slx - Demodulation functions
simulink/fmDownconvertFrame.m
Other components
- Audio source
- TCP client
- 1-bit RF output
- FM receiver
Connections 21
- Audio source → Audio sender: provides audio
- Audio sender → TCP client: sends PCM
- TCP client → Firmware service: TCP stream
- Firmware service → PCM block queue: queues PCM
- Firmware service → Audio processing: processes blocks
- Firmware service → AXI DMA: starts transfers
- PCM block queue → Firmware service: supplies blocks
- AXI DMA → AXIS audio FIFO: streams AXIS
- AXIS audio FIFO → PCM AXIS receive: provides audio
- PCM AXIS receive → FPGA top: feeds top-level path
- FPGA top → Stereo DSP: routes PCM
- FPGA top → Stereo encoder: routes stereo audio
- FPGA top → FM transmit core: routes transmit data
- FM transmit core → FM frequency word: computes tuning word
- FM transmit core → FM NCO: generates FM
- FPGA top → RF serializer: routes serial output
- RF serializer → 1-bit RF output: emits serial bits
- 1-bit RF output → FM receiver: radiates waveform
- Simulation runner → Model builder: builds when needed
- Simulation runner → Reference signal chain: runs simulation
- Simulation runner → Demodulation functions: checks reception