How valmyr/skarab-gbe-control works
This repository is a SKARAB/CASPER GbE control and loopback prototype. The principal workflow sends a UDP frame from a host, recognizes the “rece” and “tran” commands in FPGA logic, captures payload bytes, then transmits the payload back for host-side comparison. The README also documents separate AXI4-Stream slave/master paths, legacy receive/transmit buffers, decimation, and register-based debug access. The supplied tree and excerpts do not expose the RTL source itself, so RTL nodes use the enclosing project directory; the target architecture and integrations are shown only where documented.
Main entry points: ethernet_one_gbe_skarab_axi Legacy TX FSM · minimal_client.py Packet sender · autocheck_rx_rx_gen.py Loopback checker
Components 17
Host Tools
- Packet sender
script_python/socket/exploration_socket/minimal_client.py - Loopback checker
script_python/socket/autocheck_rx_rx_gen.py
GbE Control RTL
- CASPER GbE block
- GbE controller
fpgs/ethernet_one_gbe_skarab_control/ethernet_one_gbe_skarab_axi - Command detectors
fpgs/ethernet_one_gbe_skarab_control/ethernet_one_gbe_skarab_axi - Legacy RX FSM
fpgs/ethernet_one_gbe_skarab_control/ethernet_one_gbe_skarab_axi - RX buffer
fpgs/ethernet_one_gbe_skarab_control/ethernet_one_gbe_skarab_axi - Legacy TX FSM
fpgs/ethernet_one_gbe_skarab_control/ethernet_one_gbe_skarab_axi - TX decimator
fpgs/ethernet_one_gbe_skarab_control/ethernet_one_gbe_skarab_axi
AXI Stream
- AXI slave FSM
fpgs/ethernet_one_gbe_skarab_control/ethernet_one_gbe_skarab_axi - AXI RX buffer
fpgs/ethernet_one_gbe_skarab_control/ethernet_one_gbe_skarab_axi - AXI master FSM
fpgs/ethernet_one_gbe_skarab_control/ethernet_one_gbe_skarab_axi
SKARAB Debug
- Debug registers
fpgs/ethernet_one_gbe_skarab_control/ethernet_one_gbe_skarab_axi
Other components
- UDP host
- AXI stream input
- AXI stream consumer
- SKARAB registers
Connections 20
- UDP host → Packet sender: provides payload
- Packet sender → CASPER GbE block: sends UDP
- CASPER GbE block → GbE controller: receives bytes
- GbE controller → Command detectors: examines commands
- Command detectors → Legacy RX FSM: starts reception
- Command detectors → Legacy TX FSM: starts transmission
- Legacy RX FSM → RX buffer: writes payload
- RX buffer → Legacy TX FSM: supplies payload
- Legacy TX FSM → TX decimator: decimates output
- Legacy TX FSM → CASPER GbE block: transmits payload
- TX decimator → CASPER GbE block: transmits paced data
- CASPER GbE block → UDP host: returns UDP
- UDP host → Loopback checker: provides received data
- Loopback checker → UDP host: reports comparison
- AXI stream input → AXI slave FSM: provides stream
- AXI slave FSM → AXI RX buffer: writes AXI data
- AXI RX buffer → AXI master FSM: supplies buffered data
- AXI master FSM → AXI stream consumer: emits stream
- SKARAB registers → Debug registers: accesses debug state
- Debug registers → RX buffer: reads buffer