# simplessd/simplessd-fullsystem architecture

> Architecture diagram of the GitHub repository simplessd/simplessd-fullsystem, generated by GitDiagram from its file tree, README and a sample of source files (last updated 2026-09-30). It is an AI-made overview: check details against the source.

- Interactive diagram: https://gitdiagram.com/simplessd/simplessd-fullsystem
- Repository: https://github.com/simplessd/simplessd-fullsystem

## Overview

SimpleSSD is an educational SSD simulator built on gem5, intended for full-system storage evaluation. The principal runtime path is a user-provided simulation configuration through gem5’s Python entry point and SimObject configuration into the simulation engine; CPU and GPU models then execute workloads against memory and device models. The README identifies NVMe, SATA, and UFS interfaces, but their source files are absent from the supplied tree, so those nodes use the documented source directory. Several broader subsystem links are omitted where the excerpts do not establish the caller relationship.

Main entry points: [`src/sim/main.cc`](https://github.com/simplessd/simplessd-fullsystem/blob/master/src/sim/main.cc) (Simulation engine), [`src/python/m5/SimObject.py`](https://github.com/simplessd/simplessd-fullsystem/blob/master/src/python/m5/SimObject.py) (SimObject model), [`src/python/m5/main.py`](https://github.com/simplessd/simplessd-fullsystem/blob/master/src/python/m5/main.py) (Python entry), [`src/sim/cxx_manager.cc`](https://github.com/simplessd/simplessd-fullsystem/blob/master/src/sim/cxx_manager.cc) (Config manager)

## Diagram (Mermaid)

```mermaid
flowchart TD

subgraph group_configuration["Configuration"]
  node_simobjects["SimObject model<br/>[SimObject.py]"]
  node_params["Parameter system<br/>[params.py]"]
  node_configs["Simulation configs<br/>[Simulation.py]"]
end

subgraph group_runtime["Simulation runtime"]
  node_m5main["Python entry<br/>[main.py]"]
  node_cxxconfig["C++ config runner<br/>[main.cc]"]
  node_manager["Config manager<br/>[cxx_manager.cc]"]
  node_simengine["Simulation engine<br/>[main.cc]"]
  node_systemc["SystemC integration<br/>[main.cc]"]
end

subgraph group_models["Compute and memory"]
  node_cpu["Minor CPU pipeline<br/>[pipeline.cc]"]
  node_gpu_global["GPU global memory"]
  node_gpu_local["GPU local memory"]
  node_ruby["Ruby coherence"]
  node_slicc["Protocol compiler<br/>[main.py]"]
  node_copyengine["PCI copy engine<br/>[copy_engine.cc]"]
end

subgraph group_storage["Storage and analysis"]
  node_storage_interfaces["SSD interfaces"]
  node_drampower["DRAM power model<br/>[CmdHandlers.cc]"]
  node_dsent["Network modeling<br/>[Router.cc]"]
  node_mcpat["Area and power<br/>[iocontrollers.cc]"]
end

node_user(("Simulation user"))

node_user -->|"starts"| node_m5main
node_m5main -->|"loads"| node_simobjects
node_simobjects -->|"uses"| node_params
node_user -->|"configures"| node_cxxconfig
node_cxxconfig -->|"configures"| node_manager
node_manager -->|"instantiates"| node_simobjects
node_configs -.->|"supplies config"| node_m5main
node_simengine -.->|"runs"| node_cpu
node_gpu_global -->|"issues memory requests"| node_ruby
node_gpu_local -.->|"runs alongside"| node_gpu_global
node_slicc -->|"generates protocol code"| node_ruby
node_copyengine -.->|"simulates device"| node_simengine
node_user -.->|"evaluates"| node_storage_interfaces
node_drampower -.->|"models memory power"| node_simengine
node_dsent -.->|"models networks"| node_simengine
node_mcpat -.->|"estimates power"| node_simengine
node_systemc -->|"configures"| node_manager

click node_m5main "https://github.com/simplessd/simplessd-fullsystem/blob/master/src/python/m5/main.py"
click node_simobjects "https://github.com/simplessd/simplessd-fullsystem/blob/master/src/python/m5/SimObject.py"
click node_params "https://github.com/simplessd/simplessd-fullsystem/blob/master/src/python/m5/params.py"
click node_configs "https://github.com/simplessd/simplessd-fullsystem/blob/master/configs/common/Simulation.py"
click node_cxxconfig "https://github.com/simplessd/simplessd-fullsystem/blob/master/util/cxx_config/main.cc"
click node_manager "https://github.com/simplessd/simplessd-fullsystem/blob/master/src/sim/cxx_manager.cc"
click node_simengine "https://github.com/simplessd/simplessd-fullsystem/blob/master/src/sim/main.cc"
click node_cpu "https://github.com/simplessd/simplessd-fullsystem/blob/master/src/cpu/minor/pipeline.cc"
click node_gpu_global "https://github.com/simplessd/simplessd-fullsystem/blob/master/src/gpu-compute/global_memory_pipeline.cc"
click node_gpu_local "https://github.com/simplessd/simplessd-fullsystem/blob/master/src/gpu-compute/local_memory_pipeline.cc"
click node_ruby "https://github.com/simplessd/simplessd-fullsystem/blob/master/src/mem/ruby/slicc_interface/AbstractController.cc"
click node_slicc "https://github.com/simplessd/simplessd-fullsystem/blob/master/src/mem/slicc/main.py"
click node_copyengine "https://github.com/simplessd/simplessd-fullsystem/blob/master/src/dev/pci/copy_engine.cc"
click node_storage_interfaces "https://github.com/simplessd/simplessd-fullsystem/tree/master/src/dev/storage"
click node_drampower "https://github.com/simplessd/simplessd-fullsystem/blob/master/ext/drampower/src/CmdHandlers.cc"
click node_dsent "https://github.com/simplessd/simplessd-fullsystem/blob/master/ext/dsent/model/electrical/router/Router.cc"
click node_mcpat "https://github.com/simplessd/simplessd-fullsystem/blob/master/ext/mcpat/iocontrollers.cc"
click node_systemc "https://github.com/simplessd/simplessd-fullsystem/blob/master/util/systemc/gem5_within_systemc/main.cc"

classDef toneNeutral fill:#f8fafc,stroke:#334155,stroke-width:1.5px,color:#0f172a
classDef toneBlue fill:#dbeafe,stroke:#2563eb,stroke-width:1.5px,color:#172554
classDef toneAmber fill:#fef3c7,stroke:#d97706,stroke-width:1.5px,color:#78350f
classDef toneMint fill:#dcfce7,stroke:#16a34a,stroke-width:1.5px,color:#14532d
classDef toneRose fill:#ffe4e6,stroke:#e11d48,stroke-width:1.5px,color:#881337
classDef toneIndigo fill:#e0e7ff,stroke:#4f46e5,stroke-width:1.5px,color:#312e81
classDef toneTeal fill:#ccfbf1,stroke:#0f766e,stroke-width:1.5px,color:#134e4a
class node_simobjects,node_params,node_configs,node_user toneBlue
class node_m5main,node_cxxconfig,node_manager,node_simengine,node_systemc toneAmber
class node_cpu,node_gpu_global,node_gpu_local,node_ruby,node_slicc,node_copyengine toneMint
class node_storage_interfaces,node_drampower,node_dsent,node_mcpat toneRose
```

## Components

### Configuration

- [SimObject model](https://github.com/simplessd/simplessd-fullsystem/blob/master/src/python/m5/SimObject.py): `src/python/m5/SimObject.py`
- [Parameter system](https://github.com/simplessd/simplessd-fullsystem/blob/master/src/python/m5/params.py): `src/python/m5/params.py`
- [Simulation configs](https://github.com/simplessd/simplessd-fullsystem/blob/master/configs/common/Simulation.py): `configs/common/Simulation.py`

### Simulation runtime

- [Python entry](https://github.com/simplessd/simplessd-fullsystem/blob/master/src/python/m5/main.py): `src/python/m5/main.py`
- [C++ config runner](https://github.com/simplessd/simplessd-fullsystem/blob/master/util/cxx_config/main.cc): `util/cxx_config/main.cc`
- [Config manager](https://github.com/simplessd/simplessd-fullsystem/blob/master/src/sim/cxx_manager.cc): `src/sim/cxx_manager.cc`
- [Simulation engine](https://github.com/simplessd/simplessd-fullsystem/blob/master/src/sim/main.cc): `src/sim/main.cc`
- [SystemC integration](https://github.com/simplessd/simplessd-fullsystem/blob/master/util/systemc/gem5_within_systemc/main.cc): `util/systemc/gem5_within_systemc/main.cc`

### Compute and memory

- [Minor CPU pipeline](https://github.com/simplessd/simplessd-fullsystem/blob/master/src/cpu/minor/pipeline.cc): `src/cpu/minor/pipeline.cc`
- [GPU global memory](https://github.com/simplessd/simplessd-fullsystem/blob/master/src/gpu-compute/global_memory_pipeline.cc): `src/gpu-compute/global_memory_pipeline.cc`
- [GPU local memory](https://github.com/simplessd/simplessd-fullsystem/blob/master/src/gpu-compute/local_memory_pipeline.cc): `src/gpu-compute/local_memory_pipeline.cc`
- [Ruby coherence](https://github.com/simplessd/simplessd-fullsystem/blob/master/src/mem/ruby/slicc_interface/AbstractController.cc): `src/mem/ruby/slicc_interface/AbstractController.cc`
- [Protocol compiler](https://github.com/simplessd/simplessd-fullsystem/blob/master/src/mem/slicc/main.py): `src/mem/slicc/main.py`
- [PCI copy engine](https://github.com/simplessd/simplessd-fullsystem/blob/master/src/dev/pci/copy_engine.cc): `src/dev/pci/copy_engine.cc`

### Storage and analysis

- [SSD interfaces](https://github.com/simplessd/simplessd-fullsystem/tree/master/src/dev/storage): `src/dev/storage`
- [DRAM power model](https://github.com/simplessd/simplessd-fullsystem/blob/master/ext/drampower/src/CmdHandlers.cc): `ext/drampower/src/CmdHandlers.cc`
- [Network modeling](https://github.com/simplessd/simplessd-fullsystem/blob/master/ext/dsent/model/electrical/router/Router.cc): `ext/dsent/model/electrical/router/Router.cc`
- [Area and power](https://github.com/simplessd/simplessd-fullsystem/blob/master/ext/mcpat/iocontrollers.cc): `ext/mcpat/iocontrollers.cc`

### Other components

- **Simulation user**

## Connections

- Simulation user → Python entry: starts (evidence: `src/python/m5/main.py`)
- Python entry → SimObject model: loads (evidence: `src/python/m5/main.py`)
- SimObject model → Parameter system: uses (evidence: `src/python/m5/SimObject.py`)
- Simulation user → C++ config runner: configures (evidence: `util/cxx_config/main.cc`)
- C++ config runner → Config manager: configures (evidence: `util/cxx_config/main.cc`)
- Config manager → SimObject model: instantiates (evidence: `src/sim/cxx_manager.cc`)
- Simulation configs → Python entry: supplies config
- Simulation engine → Minor CPU pipeline: runs
- GPU global memory → Ruby coherence: issues memory requests (evidence: `src/gpu-compute/global_memory_pipeline.cc`)
- GPU local memory → GPU global memory: runs alongside
- Protocol compiler → Ruby coherence: generates protocol code (evidence: `src/mem/slicc/main.py`)
- PCI copy engine → Simulation engine: simulates device
- Simulation user → SSD interfaces: evaluates (evidence: `README`)
- DRAM power model → Simulation engine: models memory power
- Network modeling → Simulation engine: models networks
- Area and power → Simulation engine: estimates power
- SystemC integration → Config manager: configures (evidence: `util/systemc/gem5_within_systemc/main.cc`)