# pulp-platform/common_cells architecture

> Architecture diagram of the GitHub repository pulp-platform/common_cells, generated by GitDiagram from its file tree, README and a sample of source files (last updated 2026-09-25). It is an AI-made overview: check details against the source.

- Interactive diagram: https://gitdiagram.com/pulp-platform/common_cells
- Repository: https://github.com/pulp-platform/common_cells

## Overview

Common Cells is a reusable SystemVerilog RTL library, not an end-user application. A hardware designer selects and instantiates cells in a consuming design to implement clock/reset handling, crossings, datapaths, and other hardware functions. The README documents the library’s cell categories; no source excerpts were provided, so the graph shows documented capabilities and integration points without asserting internal call relationships.

Main entry points: [`src/cc_clk_int_div.sv`](https://github.com/pulp-platform/common_cells/blob/master/src/cc_clk_int_div.sv) (Clock divider), [`src/cc_rstgen.sv`](https://github.com/pulp-platform/common_cells/blob/master/src/cc_rstgen.sv) (Reset synchronizer), [`src/cc_cdc_2phase.sv`](https://github.com/pulp-platform/common_cells/blob/master/src/cc_cdc_2phase.sv) (Handshake CDC), [`src/cc_cdc_fifo_gray.sv`](https://github.com/pulp-platform/common_cells/blob/master/src/cc_cdc_fifo_gray.sv) (CDC FIFO)

## Diagram (Mermaid)

```mermaid
flowchart TD

subgraph group_clocking["Clocks and CDC"]
  node_clock_divider["Clock divider<br/>[cc_clk_int_div.sv]"]
  node_reset_sync["Reset synchronizer<br/>[cc_rstgen.sv]"]
  node_cdc_handshake["Handshake CDC<br/>[cc_cdc_2phase.sv]"]
  node_cdc_fifo["CDC FIFO"]
  node_cdc_reset["CDC reset control"]
  node_pulse_crossing["Pulse crossing"]
  node_clock_mux["Glitch-free mux"]
end

subgraph group_datapath["Counters and Logic"]
  node_counter["Up/down counter<br/>[cc_counter.sv]"]
  node_lfsr["LFSR<br/>[cc_lfsr.sv]"]
  node_ecc_encode["ECC encoder<br/>[cc_ecc_encode.sv]"]
  node_ecc_decode["ECC decoder<br/>[cc_ecc_decode.sv]"]
end

subgraph group_streams["Streams and Routing"]
  node_stream_fifo["Stream FIFO<br/>[cc_stream_fifo.sv]"]
  node_stream_arbiter["Stream arbiter"]
  node_stream_xbar["Stream crossbar<br/>[cc_stream_xbar.sv]"]
  node_stream_adapters["Stream adapters"]
end

subgraph group_support["Encoding and Addressing"]
  node_addr_decode["Address decode<br/>[cc_addr_decode.sv]"]
  node_arbitration["Round-robin arbitration<br/>[cc_rr_arb_tree.sv]"]
  node_memory_banks["Memory banking<br/>[cc_mem_to_banks.sv]"]
  node_bit_utilities["Bit utilities<br/>[cc_lzc.sv]"]
end

node_designer(("Hardware designer"))

node_designer -->|"instantiates"| node_clock_divider
node_designer -->|"instantiates"| node_reset_sync
node_designer -->|"instantiates"| node_cdc_handshake
node_designer -->|"instantiates"| node_cdc_fifo
node_designer -->|"instantiates"| node_cdc_reset
node_designer -->|"instantiates"| node_pulse_crossing
node_designer -->|"instantiates"| node_clock_mux
node_designer -->|"instantiates"| node_counter
node_designer -->|"instantiates"| node_lfsr
node_designer -->|"instantiates"| node_ecc_encode
node_designer -->|"instantiates"| node_ecc_decode
node_designer -->|"instantiates"| node_stream_fifo
node_designer -->|"instantiates"| node_stream_arbiter
node_designer -->|"instantiates"| node_stream_xbar
node_designer -->|"instantiates"| node_stream_adapters
node_designer -->|"instantiates"| node_addr_decode
node_designer -->|"instantiates"| node_arbitration
node_designer -->|"instantiates"| node_memory_banks
node_designer -->|"instantiates"| node_bit_utilities

click node_clock_divider "https://github.com/pulp-platform/common_cells/blob/master/src/cc_clk_int_div.sv"
click node_reset_sync "https://github.com/pulp-platform/common_cells/blob/master/src/cc_rstgen.sv"
click node_cdc_handshake "https://github.com/pulp-platform/common_cells/blob/master/src/cc_cdc_2phase.sv"
click node_cdc_fifo "https://github.com/pulp-platform/common_cells/blob/master/src/cc_cdc_fifo_gray.sv"
click node_cdc_reset "https://github.com/pulp-platform/common_cells/blob/master/src/cc_cdc_reset_ctrlr.sv"
click node_pulse_crossing "https://github.com/pulp-platform/common_cells/blob/master/src/cc_edge_propagator.sv"
click node_clock_mux "https://github.com/pulp-platform/common_cells/blob/master/src/cc_clk_mux_glitch_free.sv"
click node_counter "https://github.com/pulp-platform/common_cells/blob/master/src/cc_counter.sv"
click node_lfsr "https://github.com/pulp-platform/common_cells/blob/master/src/cc_lfsr.sv"
click node_ecc_encode "https://github.com/pulp-platform/common_cells/blob/master/src/cc_ecc_encode.sv"
click node_ecc_decode "https://github.com/pulp-platform/common_cells/blob/master/src/cc_ecc_decode.sv"
click node_stream_fifo "https://github.com/pulp-platform/common_cells/blob/master/src/cc_stream_fifo.sv"
click node_stream_arbiter "https://github.com/pulp-platform/common_cells/blob/master/src/cc_stream_arbiter.sv"
click node_stream_xbar "https://github.com/pulp-platform/common_cells/blob/master/src/cc_stream_xbar.sv"
click node_stream_adapters "https://github.com/pulp-platform/common_cells/blob/master/src/cc_stream_upsizer.sv"
click node_addr_decode "https://github.com/pulp-platform/common_cells/blob/master/src/cc_addr_decode.sv"
click node_arbitration "https://github.com/pulp-platform/common_cells/blob/master/src/cc_rr_arb_tree.sv"
click node_memory_banks "https://github.com/pulp-platform/common_cells/blob/master/src/cc_mem_to_banks.sv"
click node_bit_utilities "https://github.com/pulp-platform/common_cells/blob/master/src/cc_lzc.sv"

classDef toneNeutral fill:#f8fafc,stroke:#334155,stroke-width:1.5px,color:#0f172a
classDef toneBlue fill:#dbeafe,stroke:#2563eb,stroke-width:1.5px,color:#172554
classDef toneAmber fill:#fef3c7,stroke:#d97706,stroke-width:1.5px,color:#78350f
classDef toneMint fill:#dcfce7,stroke:#16a34a,stroke-width:1.5px,color:#14532d
classDef toneRose fill:#ffe4e6,stroke:#e11d48,stroke-width:1.5px,color:#881337
classDef toneIndigo fill:#e0e7ff,stroke:#4f46e5,stroke-width:1.5px,color:#312e81
classDef toneTeal fill:#ccfbf1,stroke:#0f766e,stroke-width:1.5px,color:#134e4a
class node_clock_divider,node_reset_sync,node_cdc_handshake,node_cdc_fifo,node_cdc_reset,node_pulse_crossing,node_clock_mux toneBlue
class node_counter,node_lfsr,node_ecc_encode,node_ecc_decode toneAmber
class node_stream_fifo,node_stream_arbiter,node_stream_xbar,node_stream_adapters toneMint
class node_addr_decode,node_arbitration,node_memory_banks,node_bit_utilities toneRose
class node_designer toneIndigo
```

## Components

### Clocks and CDC

- [Clock divider](https://github.com/pulp-platform/common_cells/blob/master/src/cc_clk_int_div.sv): `src/cc_clk_int_div.sv`
- [Reset synchronizer](https://github.com/pulp-platform/common_cells/blob/master/src/cc_rstgen.sv): `src/cc_rstgen.sv`
- [Handshake CDC](https://github.com/pulp-platform/common_cells/blob/master/src/cc_cdc_2phase.sv): `src/cc_cdc_2phase.sv`
- [CDC FIFO](https://github.com/pulp-platform/common_cells/blob/master/src/cc_cdc_fifo_gray.sv): `src/cc_cdc_fifo_gray.sv`
- [CDC reset control](https://github.com/pulp-platform/common_cells/blob/master/src/cc_cdc_reset_ctrlr.sv): `src/cc_cdc_reset_ctrlr.sv`
- [Pulse crossing](https://github.com/pulp-platform/common_cells/blob/master/src/cc_edge_propagator.sv): `src/cc_edge_propagator.sv`
- [Glitch-free mux](https://github.com/pulp-platform/common_cells/blob/master/src/cc_clk_mux_glitch_free.sv): `src/cc_clk_mux_glitch_free.sv`

### Counters and Logic

- [Up/down counter](https://github.com/pulp-platform/common_cells/blob/master/src/cc_counter.sv): `src/cc_counter.sv`
- [LFSR](https://github.com/pulp-platform/common_cells/blob/master/src/cc_lfsr.sv): `src/cc_lfsr.sv`
- [ECC encoder](https://github.com/pulp-platform/common_cells/blob/master/src/cc_ecc_encode.sv): `src/cc_ecc_encode.sv`
- [ECC decoder](https://github.com/pulp-platform/common_cells/blob/master/src/cc_ecc_decode.sv): `src/cc_ecc_decode.sv`

### Streams and Routing

- [Stream FIFO](https://github.com/pulp-platform/common_cells/blob/master/src/cc_stream_fifo.sv): `src/cc_stream_fifo.sv`
- [Stream arbiter](https://github.com/pulp-platform/common_cells/blob/master/src/cc_stream_arbiter.sv): `src/cc_stream_arbiter.sv`
- [Stream crossbar](https://github.com/pulp-platform/common_cells/blob/master/src/cc_stream_xbar.sv): `src/cc_stream_xbar.sv`
- [Stream adapters](https://github.com/pulp-platform/common_cells/blob/master/src/cc_stream_upsizer.sv): `src/cc_stream_upsizer.sv`

### Encoding and Addressing

- [Address decode](https://github.com/pulp-platform/common_cells/blob/master/src/cc_addr_decode.sv): `src/cc_addr_decode.sv`
- [Round-robin arbitration](https://github.com/pulp-platform/common_cells/blob/master/src/cc_rr_arb_tree.sv): `src/cc_rr_arb_tree.sv`
- [Memory banking](https://github.com/pulp-platform/common_cells/blob/master/src/cc_mem_to_banks.sv): `src/cc_mem_to_banks.sv`
- [Bit utilities](https://github.com/pulp-platform/common_cells/blob/master/src/cc_lzc.sv): `src/cc_lzc.sv`

### Other components

- **Hardware designer**

## Connections

- Hardware designer → Clock divider: instantiates
- Hardware designer → Reset synchronizer: instantiates
- Hardware designer → Handshake CDC: instantiates
- Hardware designer → CDC FIFO: instantiates
- Hardware designer → CDC reset control: instantiates
- Hardware designer → Pulse crossing: instantiates
- Hardware designer → Glitch-free mux: instantiates
- Hardware designer → Up/down counter: instantiates
- Hardware designer → LFSR: instantiates
- Hardware designer → ECC encoder: instantiates
- Hardware designer → ECC decoder: instantiates
- Hardware designer → Stream FIFO: instantiates
- Hardware designer → Stream arbiter: instantiates
- Hardware designer → Stream crossbar: instantiates
- Hardware designer → Stream adapters: instantiates
- Hardware designer → Address decode: instantiates
- Hardware designer → Round-robin arbitration: instantiates
- Hardware designer → Memory banking: instantiates
- Hardware designer → Bit utilities: instantiates