os-it1/minirisc

How os-it1/minirisc works

MiniRISC is a Verilog CPU with branch control, synchronous instruction/data memories, and MUL/MAC support, plus an assembler that produces instruction images. The main workflow is program assembly and loading, instruction fetch/decode, execution and memory access, then write-back or HALT; the Assignment 6 wrapper also exposes a stored result and done signal. The README documents the CPU integrations and behavior, while the only sampled RTL-adjacent source is the assembler, so internal RTL connections are shown only where documented.

Main entry points: register_file_16x32.v Register file · instruction_decoder.v Instruction decoder · fast_booth_multiplier_32.v Booth multiplier · pc_unit.v PC and selection

Components 20

Program preparation

Assembly source Assembler/input.txt
Assembler Assembler/assembler.cpp
Instruction image program.coe

CPU control and datapath

MiniRISC core minirisc32_top.v
PC and selection pc_unit.v
Instruction decoder instruction_decoder.v
Control FSM baseline_control_unit.v
Register file register_file_16x32.v
Immediate generator immediate_extension_logic.v
ALU input mux alu_input_mux.v
ALU alu32.v
Branch unit branch_unit.v
PC selection mux pc_select_mux.v

Memory system

Instruction ROM adapter instruction_bram_rom.v
Data BRAM adapter data_bram_ram.v

Multiply unit

Booth multiplier FastBoothMultiplier_58/fast_booth_multiplier_32.v
Multiplier datapath FastBoothMultiplier_58/booth_multiplier_datapath.v

Top-level interface

Autonomous wrapper minirisc32_top.v
Done and result minirisc32_top.v

Other components

Program author

Connections 24

Program author → Assembly source: writes README.md
Assembly source → Assembler: reads Assembler/assembler.cpp
Assembler → Instruction image: generates Assembler/assembler.cpp
Instruction image → Instruction ROM adapter: initializes README.md
MiniRISC core → PC and selection: uses README.md
PC and selection → Instruction ROM adapter: addresses README.md
Instruction ROM adapter → Instruction decoder: supplies instruction README.md
Instruction decoder → Control FSM: decodes for README.md
Control FSM → Register file: controls writes README.md
Instruction decoder → Immediate generator: provides fields README.md
Register file → ALU input mux: supplies operands README.md
Immediate generator → ALU input mux: supplies immediate README.md
ALU input mux → ALU: selects operands README.md
ALU → Register file: writes back README.md
Register file → Branch unit: supplies comparisons README.md
Branch unit → PC selection mux: selects branch README.md
PC selection mux → PC and selection: selects next PC README.md
Register file → Data BRAM adapter: supplies store data README.md
Data BRAM adapter → Register file: returns load data README.md
Register file → Booth multiplier: supplies operands README.md
Booth multiplier → Register file: writes result README.md
Booth multiplier → Multiplier datapath: uses
Autonomous wrapper → MiniRISC core: wraps README.md
Autonomous wrapper → Done and result: exposes store result README.md

Drawn by GitDiagram on November 11, 2026 from the repository's file tree, README and source files. Read as Markdown ·