How nirmi-thaa/fpmul-div works
This is a starter repository for a course project to design an IEEE-754 single-precision floating-point multiplier and divider. The tree contains no RTL implementation, so the graph represents only the documented design brief; it does not imply that multiplication or division is implemented. The README describes writing and submitting a design, but provides no evidence of internal runtime components or connections.
Main entry points: README.md FP MulDiv brief
Components 2
Other components
- Group engineer
- FP MulDiv brief
FP_MulDiv/README.md
Connections 1
- Group engineer → FP MulDiv brief: consults
README.md