# nickolasnolte1/cpusimulator architecture

> Architecture diagram of the GitHub repository nickolasnolte1/cpusimulator, generated by GitDiagram from its file tree, README and a sample of source files (last updated 2026-11-13). It is an AI-made overview: check details against the source.

- Interactive diagram: https://gitdiagram.com/nickolasnolte1/cpusimulator
- Repository: https://github.com/nickolasnolte1/cpusimulator

## Overview

CPUsimulator models a 4-bit CPU: a machine-code program is loaded into RAM, then the control unit provides fetch, decode, and execution operations using opcode decoding, registers, and ALU operations. The README describes a clocked instruction cycle, but the sampled code does not show an orchestrator running that cycle; MAIN.py only constructs components. The graph includes the documented clock and visualization capabilities, while marking only relationships visible in the excerpts or README. Several supporting modules and instruction examples were not sampled.

Main entry points: [`MAIN.py`](https://github.com/nickolasnolte1/cpusimulator/blob/master/MAIN.py) (CPU assembly), [`CU.py`](https://github.com/nickolasnolte1/cpusimulator/blob/master/CU.py) (Control unit), [`RAM.py`](https://github.com/nickolasnolte1/cpusimulator/blob/master/RAM.py) (RAM), [`ROM.py`](https://github.com/nickolasnolte1/cpusimulator/blob/master/ROM.py) (ROM decoder)

## Diagram (Mermaid)

```mermaid
flowchart TD

subgraph group_control["Control flow"]
  node_main["CPU assembly<br/>[MAIN.py]"]
  node_cu["Control unit<br/>[CU.py]"]
  node_clock["Instruction clock<br/>[clock.py]"]
end

subgraph group_compute["CPU components"]
  node_alu["Arithmetic logic<br/>[ALU.py]"]
  node_registers["CPU registers<br/>[Registers.py]"]
  node_ram[("RAM<br/>[RAM.py]")]
  node_rom["ROM decoder<br/>[ROM.py]"]
  node_memory["Memory component<br/>[Memory.py]"]
  node_circuit["Circuit base"]
end

subgraph group_configuration["Program and display"]
  node_program["Machine-code program<br/>[cpufm.txt]"]
  node_bios["BIOS configuration<br/>[bios.yaml]"]
  node_display["CPU state display<br/>[PrettyPrint.py]"]
end

node_user(("Program author"))

node_user -->|"writes program"| node_program
node_main -->|"constructs"| node_cu
node_main -->|"constructs"| node_alu
node_main -->|"constructs"| node_clock
node_main -->|"constructs"| node_memory
node_main -->|"constructs"| node_ram
node_main -->|"constructs"| node_rom
node_main -->|"constructs"| node_registers
node_ram -->|"reads instructions"| node_program
node_ram -->|"loads data from"| node_rom
node_rom -->|"loads configuration"| node_bios
node_cu -->|"fetches and accesses"| node_ram
node_cu -->|"decodes opcodes"| node_rom
node_cu -->|"reads and writes"| node_registers
node_cu -->|"requests operations"| node_alu
node_cu -->|"inherits from"| node_circuit
node_alu -->|"inherits from"| node_circuit
node_registers -->|"inherits from"| node_circuit
node_memory -->|"inherits from"| node_circuit
node_user -->|"requests display"| node_display
node_user -.->|"uses timed cycle"| node_clock

click node_main "https://github.com/nickolasnolte1/cpusimulator/blob/master/MAIN.py"
click node_cu "https://github.com/nickolasnolte1/cpusimulator/blob/master/CU.py"
click node_clock "https://github.com/nickolasnolte1/cpusimulator/blob/master/clock.py"
click node_alu "https://github.com/nickolasnolte1/cpusimulator/blob/master/ALU.py"
click node_registers "https://github.com/nickolasnolte1/cpusimulator/blob/master/Registers.py"
click node_ram "https://github.com/nickolasnolte1/cpusimulator/blob/master/RAM.py"
click node_rom "https://github.com/nickolasnolte1/cpusimulator/blob/master/ROM.py"
click node_memory "https://github.com/nickolasnolte1/cpusimulator/blob/master/Memory.py"
click node_circuit "https://github.com/nickolasnolte1/cpusimulator/blob/master/IntegratedCircuit.py"
click node_program "https://github.com/nickolasnolte1/cpusimulator/blob/master/cpufm.txt"
click node_bios "https://github.com/nickolasnolte1/cpusimulator/blob/master/bios.yaml"
click node_display "https://github.com/nickolasnolte1/cpusimulator/blob/master/PrettyPrint.py"

classDef toneNeutral fill:#f8fafc,stroke:#334155,stroke-width:1.5px,color:#0f172a
classDef toneBlue fill:#dbeafe,stroke:#2563eb,stroke-width:1.5px,color:#172554
classDef toneAmber fill:#fef3c7,stroke:#d97706,stroke-width:1.5px,color:#78350f
classDef toneMint fill:#dcfce7,stroke:#16a34a,stroke-width:1.5px,color:#14532d
classDef toneRose fill:#ffe4e6,stroke:#e11d48,stroke-width:1.5px,color:#881337
classDef toneIndigo fill:#e0e7ff,stroke:#4f46e5,stroke-width:1.5px,color:#312e81
classDef toneTeal fill:#ccfbf1,stroke:#0f766e,stroke-width:1.5px,color:#134e4a
class node_main,node_cu,node_clock toneBlue
class node_alu,node_registers,node_ram,node_rom,node_memory,node_circuit toneAmber
class node_program,node_bios,node_display toneMint
class node_user toneIndigo
```

## Components

### Control flow

- [CPU assembly](https://github.com/nickolasnolte1/cpusimulator/blob/master/MAIN.py): `MAIN.py`
- [Control unit](https://github.com/nickolasnolte1/cpusimulator/blob/master/CU.py): `CU.py`
- [Instruction clock](https://github.com/nickolasnolte1/cpusimulator/blob/master/clock.py): `clock.py`

### CPU components

- [Arithmetic logic](https://github.com/nickolasnolte1/cpusimulator/blob/master/ALU.py): `ALU.py`
- [CPU registers](https://github.com/nickolasnolte1/cpusimulator/blob/master/Registers.py): `Registers.py`
- [RAM](https://github.com/nickolasnolte1/cpusimulator/blob/master/RAM.py): `RAM.py`
- [ROM decoder](https://github.com/nickolasnolte1/cpusimulator/blob/master/ROM.py): `ROM.py`
- [Memory component](https://github.com/nickolasnolte1/cpusimulator/blob/master/Memory.py): `Memory.py`
- [Circuit base](https://github.com/nickolasnolte1/cpusimulator/blob/master/IntegratedCircuit.py): `IntegratedCircuit.py`

### Program and display

- [Machine-code program](https://github.com/nickolasnolte1/cpusimulator/blob/master/cpufm.txt): `cpufm.txt`
- [BIOS configuration](https://github.com/nickolasnolte1/cpusimulator/blob/master/bios.yaml): `bios.yaml`
- [CPU state display](https://github.com/nickolasnolte1/cpusimulator/blob/master/PrettyPrint.py): `PrettyPrint.py`

### Other components

- **Program author**

## Connections

- Program author → Machine-code program: writes program (evidence: `README.md`)
- CPU assembly → Control unit: constructs (evidence: `MAIN.py`)
- CPU assembly → Arithmetic logic: constructs (evidence: `MAIN.py`)
- CPU assembly → Instruction clock: constructs (evidence: `MAIN.py`)
- CPU assembly → Memory component: constructs (evidence: `MAIN.py`)
- CPU assembly → RAM: constructs (evidence: `MAIN.py`)
- CPU assembly → ROM decoder: constructs (evidence: `MAIN.py`)
- CPU assembly → CPU registers: constructs (evidence: `MAIN.py`)
- RAM → Machine-code program: reads instructions (evidence: `RAM.py`)
- RAM → ROM decoder: loads data from (evidence: `RAM.py`)
- ROM decoder → BIOS configuration: loads configuration (evidence: `ROM.py`)
- Control unit → RAM: fetches and accesses (evidence: `CU.py`)
- Control unit → ROM decoder: decodes opcodes (evidence: `CU.py`)
- Control unit → CPU registers: reads and writes (evidence: `CU.py`)
- Control unit → Arithmetic logic: requests operations (evidence: `CU.py`)
- Control unit → Circuit base: inherits from (evidence: `CU.py`)
- Arithmetic logic → Circuit base: inherits from (evidence: `ALU.py`)
- CPU registers → Circuit base: inherits from (evidence: `Registers.py`)
- Memory component → Circuit base: inherits from (evidence: `Memory.py`)
- Program author → CPU state display: requests display (evidence: `PrettyPrint.py`)
- Program author → Instruction clock: uses timed cycle (evidence: `README.md`)