How mohammad-ismael/cas_cycle_accurate_simulator works
CAS is a SystemVerilog RTL simulator with an integrated verification IDE. The principal workflow accepts design sources and simulation options, parses them into an AST, elaborates the design, runs discrete-event simulation, and produces waveform and profiling outputs. The graph also includes documented IDE, diagnostics, and waveform-viewer capabilities. Some web wiring and unsampled runtime internals are not shown in the excerpts, so those relationships are omitted or marked unverified.
Main entry points: engine.cpp Engine · main.cpp CLI Runner · server.py Studio Server · lexer.cpp Lexer
Components 18
Simulator Entry
- CLI Runner
CAS/src/main.cpp
Language Frontend
- Lexer
CAS/src/frontend/lexer.cpp - SystemVerilog Parser
CAS/src/frontend/parser.cpp - Design AST
CAS/include/frontend/ast_module.hpp
Simulation Kernel
- Engine
CAS/src/engine.cpp - Design Elaboration
CAS/src/kernel/elaborator.cpp - Event Scheduler
CAS/src/kernel/scheduler.cpp - Expression Evaluation
CAS/src/kernel/expr_evaluator.cpp - Four-State Logic
CAS/include/common/logic_val.hpp
Simulation Outputs
- VCD Dumper
CAS/src/tracer/vcd_dumper.cpp - Hardware Profiler
CAS/src/profiler/profiler.cpp
Studio Environment
- Studio Server
server.py - Multi-file IDE
static/js/app.js - Source Editor
static/js/editor.js - Diagnostic Console
static/js/console.js - Waveform Viewer
static/waveviewer/js/wave_app.js - VCD Parser
static/waveviewer/js/vcd_parser.js
Other components
- Engineer
Connections 17
- Engineer → CLI Runner: supplies sources
- CLI Runner → Lexer: starts parsing
CAS/src/main.cpp - Lexer → SystemVerilog Parser: tokenizes input
- SystemVerilog Parser → Design AST: builds AST
- Design AST → Engine: design input
- Engine → Design Elaboration: elaborates design
- Engine → Event Scheduler: runs simulation
- Engine → Expression Evaluation: evaluates design
- Expression Evaluation → Four-State Logic: uses logic values
- CLI Runner → Engine: runs engine
CAS/src/main.cpp - Engine → VCD Dumper: emits waveforms
- Engine → Hardware Profiler: collects profiling
- Engineer → Multi-file IDE: edits designs
- Multi-file IDE → Studio Server: uses environment
- Studio Server → Diagnostic Console: serves diagnostics
- Studio Server → Waveform Viewer: serves viewer
- Waveform Viewer → VCD Parser: parses waveform