# kauangod/uprocessor architecture

> Architecture diagram of the GitHub repository kauangod/uprocessor, generated by GitDiagram from its file tree, README and a sample of source files (last updated 2026-09-25). It is an AI-made overview: check details against the source.

- Interactive diagram: https://gitdiagram.com/kauangod/uprocessor
- Repository: https://github.com/kauangod/uprocessor

## Overview

This repository appears to implement a VHDL processor, with memory, control, register, and ALU components. The tree supports those component roles, but no source excerpts or README are available to verify wiring or the user-to-result workflow; edges are therefore omitted rather than inferred.

## Diagram (Mermaid)

```mermaid
flowchart TD

subgraph group_processor["Processor"]
  node_cpu["Processor<br/>[processador.vhd]"]
  node_pc["Program Counter<br/>[PC.vhd]"]
  node_instruction["Instruction Register"]
end

subgraph group_memory["Memory"]
  node_rom[("ROM<br/>[rom.vhd]")]
  node_ram[("RAM<br/>[ram.vhd]")]
end

subgraph group_control["Control"]
  node_uc["Control Unit<br/>[uc.vhd]"]
  node_state_machine["State Machine<br/>[state_machine.vhd]"]
end

subgraph group_datapath["Datapath"]
  node_register_bank["Register Bank<br/>[banco_regs.vhd]"]
  node_register_mux["Register Mux<br/>[mux3bits.vhd]"]
  node_register16["16-bit Register<br/>[reg16bits.vhd]"]
  node_ula["ALU<br/>[ULA.vhd]"]
  node_adder["Adder<br/>[adder.vhd]"]
  node_subtractor["Subtractor<br/>[subtractor.vhd]"]
  node_mux16["16-bit Mux<br/>[mux16b.vhd]"]
  node_shifter["Right Shifter<br/>[r_shifter.vhd]"]
  node_xor["XOR Operation<br/>[xor_op.vhd]"]
  node_accumulator["Accumulator<br/>[acumulador.vhd]"]
  node_psw["Status Word<br/>[PSW.vhd]"]
end

click node_cpu "https://github.com/kauangod/uprocessor/blob/main/top_level/src/processador.vhd"
click node_pc "https://github.com/kauangod/uprocessor/blob/main/top_level/src/PC.vhd"
click node_instruction "https://github.com/kauangod/uprocessor/blob/main/top_level/src/instruction_reg.vhd"
click node_rom "https://github.com/kauangod/uprocessor/blob/main/top_level/src/rom.vhd"
click node_ram "https://github.com/kauangod/uprocessor/blob/main/top_level/src/ram.vhd"
click node_uc "https://github.com/kauangod/uprocessor/blob/main/uc/src/uc.vhd"
click node_state_machine "https://github.com/kauangod/uprocessor/blob/main/uc/src/state_machine.vhd"
click node_register_bank "https://github.com/kauangod/uprocessor/blob/main/register_file/src/banco_regs.vhd"
click node_register_mux "https://github.com/kauangod/uprocessor/blob/main/register_file/src/mux3bits.vhd"
click node_register16 "https://github.com/kauangod/uprocessor/blob/main/register_file/src/reg16bits.vhd"
click node_ula "https://github.com/kauangod/uprocessor/blob/main/ula/src/ULA.vhd"
click node_adder "https://github.com/kauangod/uprocessor/blob/main/ula/src/adder.vhd"
click node_subtractor "https://github.com/kauangod/uprocessor/blob/main/ula/src/subtractor.vhd"
click node_mux16 "https://github.com/kauangod/uprocessor/blob/main/ula/src/mux16b.vhd"
click node_shifter "https://github.com/kauangod/uprocessor/blob/main/ula/src/r_shifter.vhd"
click node_xor "https://github.com/kauangod/uprocessor/blob/main/ula/src/xor_op.vhd"
click node_accumulator "https://github.com/kauangod/uprocessor/blob/main/top_level/src/acumulador.vhd"
click node_psw "https://github.com/kauangod/uprocessor/blob/main/top_level/src/PSW.vhd"

classDef toneNeutral fill:#f8fafc,stroke:#334155,stroke-width:1.5px,color:#0f172a
classDef toneBlue fill:#dbeafe,stroke:#2563eb,stroke-width:1.5px,color:#172554
classDef toneAmber fill:#fef3c7,stroke:#d97706,stroke-width:1.5px,color:#78350f
classDef toneMint fill:#dcfce7,stroke:#16a34a,stroke-width:1.5px,color:#14532d
classDef toneRose fill:#ffe4e6,stroke:#e11d48,stroke-width:1.5px,color:#881337
classDef toneIndigo fill:#e0e7ff,stroke:#4f46e5,stroke-width:1.5px,color:#312e81
classDef toneTeal fill:#ccfbf1,stroke:#0f766e,stroke-width:1.5px,color:#134e4a
class node_cpu,node_pc,node_instruction toneBlue
class node_rom,node_ram toneAmber
class node_uc,node_state_machine toneMint
class node_register_bank,node_register_mux,node_register16,node_ula,node_adder,node_subtractor,node_mux16,node_shifter,node_xor,node_accumulator,node_psw toneRose
```

## Components

### Processor

- [Processor](https://github.com/kauangod/uprocessor/blob/main/top_level/src/processador.vhd): `top_level/src/processador.vhd`
- [Program Counter](https://github.com/kauangod/uprocessor/blob/main/top_level/src/PC.vhd): `top_level/src/PC.vhd`
- [Instruction Register](https://github.com/kauangod/uprocessor/blob/main/top_level/src/instruction_reg.vhd): `top_level/src/instruction_reg.vhd`

### Memory

- [ROM](https://github.com/kauangod/uprocessor/blob/main/top_level/src/rom.vhd): `top_level/src/rom.vhd`
- [RAM](https://github.com/kauangod/uprocessor/blob/main/top_level/src/ram.vhd): `top_level/src/ram.vhd`

### Control

- [Control Unit](https://github.com/kauangod/uprocessor/blob/main/uc/src/uc.vhd): `uc/src/uc.vhd`
- [State Machine](https://github.com/kauangod/uprocessor/blob/main/uc/src/state_machine.vhd): `uc/src/state_machine.vhd`

### Datapath

- [Register Bank](https://github.com/kauangod/uprocessor/blob/main/register_file/src/banco_regs.vhd): `register_file/src/banco_regs.vhd`
- [Register Mux](https://github.com/kauangod/uprocessor/blob/main/register_file/src/mux3bits.vhd): `register_file/src/mux3bits.vhd`
- [16-bit Register](https://github.com/kauangod/uprocessor/blob/main/register_file/src/reg16bits.vhd): `register_file/src/reg16bits.vhd`
- [ALU](https://github.com/kauangod/uprocessor/blob/main/ula/src/ULA.vhd): `ula/src/ULA.vhd`
- [Adder](https://github.com/kauangod/uprocessor/blob/main/ula/src/adder.vhd): `ula/src/adder.vhd`
- [Subtractor](https://github.com/kauangod/uprocessor/blob/main/ula/src/subtractor.vhd): `ula/src/subtractor.vhd`
- [16-bit Mux](https://github.com/kauangod/uprocessor/blob/main/ula/src/mux16b.vhd): `ula/src/mux16b.vhd`
- [Right Shifter](https://github.com/kauangod/uprocessor/blob/main/ula/src/r_shifter.vhd): `ula/src/r_shifter.vhd`
- [XOR Operation](https://github.com/kauangod/uprocessor/blob/main/ula/src/xor_op.vhd): `ula/src/xor_op.vhd`
- [Accumulator](https://github.com/kauangod/uprocessor/blob/main/top_level/src/acumulador.vhd): `top_level/src/acumulador.vhd`
- [Status Word](https://github.com/kauangod/uprocessor/blob/main/top_level/src/PSW.vhd): `top_level/src/PSW.vhd`