How gokulp50/lin works
This is a SystemVerilog LIN 2.1 controller supporting Master and Slave communication, with RTL modules for transmission, reception, checksum, and baud generation. Its documented workflow is LIN frame communication through the controller, with UART TX/RX and checksum handling. The repository also includes testbenches for controller and component verification. Source excerpts were unavailable, so internal wiring and detailed testbench behavior are not asserted beyond the README and file names.
Main entry points: lin_controller.sv LIN controller · lin_tx.sv Frame transmitter · lin_rx.sv Frame receiver · lin_checksum.sv Checksum logic
Components 12
LIN Controller RTL
- LIN controller
rtl/lin_controller.sv - Frame transmitter
rtl/lin_tx.sv - Frame receiver
rtl/lin_rx.sv - Checksum logic
rtl/lin_checksum.sv - Baud generator
rtl/lin_baud_gen.sv
Verification
- Controller testbench
tb/lin_controller_tb.sv - TX testbench
tb/lin_tx_tb.sv - RX testbench
tb/lin_rx_tb.sv - Checksum testbench
tb/lin_checksum_tb.sv - Baud testbench
tb/baud_tb.sv - LIN verification bench
tb/lin.sv
Other components
- LIN peer
Connections 10
- LIN peer → LIN controller: exchanges frames
- LIN controller → Frame transmitter: transmits frames
- LIN controller → Frame receiver: receives frames
- LIN controller → Checksum logic: validates checksum
- LIN controller → Baud generator: sets baud
- Controller testbench → LIN controller: verifies
- TX testbench → Frame transmitter: verifies
- RX testbench → Frame receiver: verifies
- Checksum testbench → Checksum logic: verifies
- Baud testbench → Baud generator: verifies