How freeb1e/frodo_acceleration_engine works
Frodo Acceleration Engine is a Verilog/SystemVerilog accelerator simulator for FrodoKEM’s matrix and SHAKE/sampling paths, with a Python instruction-generation and reference-model layer and a C++ DPI memory bridge. The principal workflow is to generate a keygen/encapsulation/decapsulation instruction program, assemble it, run it on TEST_PLATFORM, then inspect or compare RAM results. The graph preserves the documented systolic, SHAKE/sampling, memory, and reference-analysis branches. Hardware wiring beyond the documented module roles is not established by the sampled RTL, so uncertain internal links are omitted.
Main entry points: TEST_PLATFORM.sv TEST_PLATFORM · systolic.sv Systolic compute · sha3_ctrl.sv SHAKE controller · sim.cpp DPI simulator
Components 21
Program authoring
- Workflow generator
simdata/program.py - Instruction API
simdata/face_lib.py - Instruction assembler
simdata/assembler.py
Simulation platform
- TEST_PLATFORM
vsrc/TEST_PLATFORM.sv - DPI simulator
csrc/sim.cpp - RAM initialization
csrc/testinit.cpp - RAM and DPI bridge
csrc/memory.cpp - RAM bus
vsrc/RAMBUS.sv
Hardware engines
- Systolic compute
vsrc/SYSTOLIC/systolic.sv - Multiply datapath
vsrc/SYSTOLIC/mul_top.sv - Array memory control
vsrc/SYSTOLIC/mem_ctrl_new.sv - Transpose path
vsrc/SYSTOLIC/transposition.sv - SHAKE controller
vsrc/SHA/sha3_ctrl.sv - SHA3 datapath
vsrc/SHA/sha3.v - A sampler
vsrc/SAMPLER/A_sampler.sv - SE sampler
vsrc/SAMPLER/SE_sampler.sv
Reference analysis
- Matrix reference
py/goldengen.py - SHAKE trace
py/trace_keccak_absorb_states.py - Accumulation trace
py/bprime_s_accum_trace.py - SHAKE reference
py/pkh.py
Other components
- Engineer
Connections 21
- Engineer → Workflow generator: selects workflow
- Workflow generator → Instruction API: emits instructions
- Instruction API → Instruction assembler: writes assembly
- Instruction assembler → TEST_PLATFORM: produces firmware
- DPI simulator → TEST_PLATFORM: evaluates DUT
- DPI simulator → RAM initialization: initializes test
- RAM initialization → RAM and DPI bridge: loads RAM
- TEST_PLATFORM → RAM bus: accesses RAM
- RAM bus → RAM and DPI bridge: DPI memory access
- TEST_PLATFORM → Systolic compute: dispatches compute
- Systolic compute → Multiply datapath: uses datapath
- Systolic compute → Array memory control: controls transfers
- Systolic compute → Transpose path: supports transpose
- TEST_PLATFORM → SHAKE controller: dispatches SHAKE
- SHAKE controller → SHA3 datapath: runs permutation
- SHAKE controller → A sampler: generates A
- SHAKE controller → SE sampler: generates S/E
- Matrix reference → Engineer: provides comparison
- SHAKE trace → Engineer: exports absorb trace
- Accumulation trace → Engineer: reports accumulations
- SHAKE reference → Engineer: reports SHAKE state